What You Do At AMD Changes Everything At AMD, we push the boundaries of what is possible. We believe in changing the world for the better by driving innovation in high-performance computing, graphics, and visualization technologies – building blocks for gaming, immersive platforms, and the data center. Developing great technology takes more than talent: it takes amazing people who understand collaboration, respect, and who will go the “extra mile” to achieve unthinkable results. It takes people who have the passion and desire to disrupt the status quo, push boundaries, deliver innovation, and change the world. If you have this type of passion, we invite you to take a look at the opportunities available to come join our team. (Contract) Display IP MTS Verification Design Engineer Role The Display IP is one of the foundational IP's within AMD and is incorporated in all AMD SOC's which feature direct connectivity to a display device through Display Port, HDMI or USB-C connectors. Beyond the output encoding, the Display IP plays a significant role in the pixel processing and system power reduction strategies within the SOC. The Display Controller team within the Radeon Technologies Group(RTG) is looking for an individual to participate in the design verification of the Display IP. Person The candidate would participate on a team of design verification, architects and design engineers, working closely with other team members to understand and verify the functionality of the design within the context of the unit, block, and overall system. The candidate would be responsible for carefully documenting and executing test plans consisting of directed and random tests to be run under simulation and hardware acceleration and to add and collect functional coverage. Experience with hardware modelling, assertions, coverage and formal verification methods are required. The candidate would be encouraged to adopt evolving verification methodologies used in the industry as well as develop custom techniques to functionally verify increasingly complex IP designs within ambitious schedules. Key Responsibilities Join in the development of leading-edge display technologies and understand the architecture of the Display IP and functional blocks being designed. Use advanced verification methodologies for the verification of complex designs Own and execute on verification of a sizable design by applying UVM verification methodology Work with existing tools/flows or develop new tools/flows to complete the assigned verification task Compose test and coverage plan, and validation vectors to ensure functional completeness Build SystemVerilog and/or C/C++ models and test sequence libraries for simulation Build test bench, agents, monitors and scoreboard for DUV Debug function/performance bugs of Display IP Preferred Experience: 7 years of experience in ASIC verification Solid understanding of ASIC IP verification methodologies and processes Must be proficient in Verilog and System Verilog language Must have working experience with UVM, OVM or equivalent Must be good at C/C++ programming, and working in Linux and Windows environments Must have ASIC design knowledge and be able to debug Verilog RTL code using simulation/emulation tools Must have ASIC design verification experience in test plans, test creation, and triage, coverage and assertion, etc. Must be proficient of script language like Perl, Python Must have excellent writing and communication skills Must demonstrate strong analytical thinking and problem-solving skills with excellent attention to detail Must have good teamwork and interpersonal skills Academic Credentials: BS 7 years or MS 5 years or PhD 3 years of Electrical Engineering and/or Computer Architecture work experience. Requisition Number: 98024 Country: Canada Province: Ontario City: Markham Job Function:Design AMD is an inclusive employer dedicated to building a diverse workforce. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective provincial human rights codes throughout all stages of the recruitment and selection process. Any applicant who requires accommodation should contact [Register to View]
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